Coarse-grained reconfigurable arrays (CGRAs) are programmable hardware devices within the broader umbrella of reconfigurable architectures. They are promising candidates for the realization of application accelerators. In contrast to FPGAs, CGRAs are configurable at the word level, rather than the bit level. This distinction positions CGRAs to deliver power, performance, and area characteristics more closely aligned with custom ASICs. Notably, the emergence of numerous machine-learning accelerator startups, such as Tenstorrent, Groq, Cerebras, and SambaNova, offer architectures that closely resemble CGRAs.

CGRA-ME is an open-source CGRA modeling and exploration framework actively being developed at the University of Toronto. CGRA-ME is intended to facilitate research on new CGRA architectures and new CAD algorithms. Given the current surge in research interest in CGRAs from both industry and academia, this tutorial aims to provide valuable insights and practical guidance in this dynamic field.

Lab installation instructions are at this link: https://www.eecg.utoronto.ca/~raghebom/date_cgrame/lab_install_instr.pdf

The lab materials are at this link: https://www.eecg.utoronto.ca/~raghebom/date_cgrame/

Speakers

• Dr. Jason Anderson, Professor, University of Toronto, Toronto, Canada
• Dr. Kentaro Sano, Processor Research Team Head, RIKEN Center for Computational Science, Kobe, Japan
• Omar Ragheb, Ph.D. Candidate, University of Toronto, Toronto, Canada
• Stephen Wicklund, MASc. Candidate, University of Toronto, Toronto, Canada

Target Audience

We invite DATE 2024 participants with a keen interest in reconfigurable architectures and computer-aided design (CAD) tools. Please join us!

Learning objectives

• A brief history of coarse-grained reconfigurable arrays (CGRAs).
• An introduction to the CGRA-ME framework.
• Details of the building blocks of the tool.
• Description of the CAD algorithms utilized.
• Learning how CGRA architectures are defined.
• Hands-on experimentation using CGRA-ME.
• Motivate future research within the CGRA-ME framework.

Required background

• Familiarity with C++ and Linux.
• A keen interest in learning about CGRA architectures and CAD, or application acceleration using CGRAs.
• Desirable: prior knowledge of reconfigurable hardware and associated design methodologies.

Detailed Program

• Part 1: Lecture (45 mins)
• Part 2: Hands-on session (45 mins)

Lab installation instructions are at this link:

https://www.eecg.utoronto.ca/~raghebom/date_cgrame/lab_install_instr.pdf

And the lab materials are at this link:

https://www.eecg.utoronto.ca/~raghebom/date_cgrame/