Integrating reconfigurable hardware components into heterogeneous Systems-on-Chip (SoCs) presents a promising opportunity for tackling the growing demand for performance, flexibility, and energy efficiency in computing systems. In this context, this presentation describes the use of Coarse-Grained Reconfigurable Architectures (CGRAs) for deploying domain-specific applications in energy-constrained scenarios. Despite being less flexible than fine-grain reconfigurable FPGAs, the coarser granularity of the CGRA reconfigurable elements reduces the reconfiguration overhead in terms of time and power consumption. CGRA-base acceleration can benefit from the Open-source RISC-V-based ecosystem to provide innovative SoCs by reusing highly flexible processing architectures already tested and validated, together with the proposed reconfigurable architecture. This approach makes it possible to focus on exploring different configurations for the memory infrastructure, on-chip interconnections, and control interfaces to properly exploit the CGRA. In particular, this presentation addresses the integration of an elastic CGRA accelerator into two different open-source frameworks: Chipyard and X-HEEP. These two variants target different computing scenarios, high-performance, and low-power embedded computing, respectively, showcasing the adaptability of the CGRA fabric while meeting diverse computing needs.

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