Open-source hardware holds a promise of sustaining the progress of the semiconductor industry in the age of heterogeneous computing. It can enable design reuse, foster design collaboration, and support workforce development. ESP is an open-source research platform for system-on-chip (SoC) design that combines a modular architecture and an agile design methodology. The ESP architecture simplifies the design and prototyping of heterogeneous chips with multiple RISC-V processor cores and dozens of loosely-coupled accelerators, all interconnected with a scalable network-on-chip. The ESP methodology promotes system-level design while accommodating different specification languages and design flows. ESP's capabilities have allowed a small team of mostly graduate students to realize two SoCs of growing complexity, each in the span of just a few months. Conceived as a heterogeneous system integration platform and developed through years of teaching at Columbia University, ESP is intrinsically suited to advance collaborative engineering across the open-source hardware community.