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W03 Workshop on Nano Security: From Nano-Electronics to Secure Systems

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End
Room
TBD
Organiser
Ilia Polian, University of Stuttgart, Germany
Organiser
Nan Du, Friedrich Schiller University Jena, Germany, Germany
Organiser
Shahar Kvatinsky, Technion – Israel Institute of Technology, Israel
Organiser
Ingrid Verbauwhede, KU Leuven, Belgium
URL
Workshop website at the University of Stuttgart

Today’s societies critically depend on electronic systems. Security of such systems are facing completely new challenges due to the ongoing transition to radically new types of nano-electronic devices, such as memristors, spintronics, or carbon nanotubes. The use of such emerging nano-technologies is inevitable to address the essential needs related to energy efficiency, computing power and performance. Therefore, the entire industry are switching to emerging nano-electronics alongside scaled CMOS technologies in heterogeneous integrated systems. These technologies come with new properties and also facilitate the development of radically different computer architectures.

The second edition of the NanoSec workshop will bring together researchers from hardware-oriented security and from emerging hardware technology. It will explore the potential of new technologies and architectures to provide new opportunities for achieving security targets, but it will also raise questions about their vulnerabilities to new types of hardware-oriented attacks. The workshop is based on a Priority Program https://spp-nanosecurity.uni-stuttgart.de/ funded since 2019 by the German DFG, and will be open to members and non-members of that Priority Program alike.

 

Keynote

Session Start
Session End
Session chair
Michael Hutter, PQShield, Vienna, Austria

The Impact of Logic Synthesis and Technology Mapping on Logic Locking Security

Lilas Alrahis, NYU Abu Dhabi

Session 1: Secure Architectures

Session Start
Session End
Session chair
Giorgio Di Natale, TIMA, France

Okapi: A Lightweight Architecture for Secure Speculation Exploiting Locality of Memory Accesses

Philipp Schmitz1, Tobias Jauch1, Alex Wezel1, Mohammad R. Fadiheh2, Thore Tiemann3, Jonah Heller3, Thomas Eisenbarth3, Dominik Stoffel1, Wolfgang Kunz1

1RPTU Kaiserslautern-Landau, 2Stanford U, 3U Lübeck

Neuromorphic and In-Memory Computing Based on Memristive Circuits for Predictive Maintenance and Supply-Chain Management and Security

Nikolaos Athanasios Anagnostopoulos, Nico Mexis, Stefan Katzenbeisser, Elif Bilge Kavun, Tolga Arul, U Passau

Poster session: Projects of Priority Program Nano Security

Session Start
Session End
Organiser
Ilia Polian, University of Stuttgart, Germany

OnE-Secure: Securing State-of-the-Art Chips Against High-Resolution Contactless Optical and Electron-Beam Probing Attacks

Sebastian Brand (FhG IMWS), Rolf Drechsler (U Bremen), Jean-Pierre Seifert TU Berlin), Frank Sill Torres (DLR)

STAMPS-PLUS: Exploration of an integrated Strain-based TAMPer Sensor for Puf and trng concepts with best-in-class Leakage resilience and robUStness

Ralf Brederlow (TU Munich), Matthias Hiller (FhG AISEC), Michael Pehl (TU Munich)

RAINCOAT: Randomization in Secure Nano-Scale Microarchitectures 2

Lucas Davi (U Duisburg-Essen), Tim Güneysu (RU Bochum)

EMBOSOM: Embedded Software Security into Modern Emerging Hardware Paradigms

Rolf Drechsler (U Bremen), Tim Güneysu (RU Bochum)

MemCrypto: Towards Secure Electroforming-free Memristive Cryptographic Implementations

Nan Du (FSU Jena), Ilia Polian (U Stuttgart)

HaSPro: Verifiable Hardware Security for Out-of-Order Processors

Thomas Eisenbarth (U Lübeck), Wolfgang Kunz (TU Kaiserslautern)

NanoSec2: Nanomaterial-based platform electronics for PUF circuits with extended entropy sources

Sascha Herrmann (TU Chemnitz), Stefan Kat-zenbeisser (U Passau), Elif Kavun (U Passau)

SecuReFET: Secure Circuits through Inherent Reconfigurable FET

Akash Kumar (TU Dresden), Thomas Mikolajick (NaMLab GmbH)

SSIMA: Scalable Side-Channel Immune Micro-Architecture

Amir Moradi (TU Darmstadt)

SeMSiNN: Secure Mixed-SIgnal Neural Networks

Maurits Ortmanns (U Ulm), Ilia Polian (U Stuttgart)

Session 2: Physical Aspects of Secure Computing in the Nano Regime

Session Start
Session End
Session chair
Francesco Regazzoni, University of Amsterdam, NL and Università della Svizzera italiana, Switzerland

Hardware Trojan Detection Using Optical Probing

Sajjad Parvin1, Frank Sill Torres2, Rolf Drechsler1, 1U Bremen, 2DLR Bremen

A Cautionary Note about Bit Flips in ReRAM

Felix Staudigl1, Jan Philipp Thoma2, Christian Niesler3, Karl J. X. Sturm1, Rebecca Pelke1, Dominik Sisejkovic1, Jan Moritz Joseph1, Tim Güneysu2, Lucas Davi3, Rainer Leupers1

1RWTH Aachen, 2RU Bochum, 3U Duisburg Essen

An Analysis of the Effects of Temperature on the Performance of ReRAM-Based TRNGs

Nico Mexis, Nikolaos Athanasios Anagnostopoulos, Stefan Katzenbeisser, Tolga Arul, U Passau

Session 3: Emerging Technologies for Security

Session Start
Session End
Session chair
Haralampos-G. Stratigopoulos, Sorbonne Universités, CNRS, LIP6, France

A Guide to Assessing Emerging Reconfigurable Nanotechnologies for Robust IP Protection

Armin Darjani, Nima Kavand, Akash Kumar, TU Dresden

Fingerprinting and Identification of Hall Sensors

Christoph Frisch1, Tobias Chlan1, Carl Riehm1, Markus Sand2, Markus Stahl-Offergeld3, Michael Pehl1, Ralf Brederlow1,3

1TU Munich, 2LZE GmbH, 3Fraunhofer Institute for Integrated Circuits IIS

Memristors in the Context of Security and AI

Alexander Tekles, Tolga Arul, Nico Mexis, Stefan Katzenbeisser, Nikolaos Athanasios Anagnostopoulos, U Passau