Photos are available in the DATE 2024 Gallery.

The time zone for all times mentioned at the DATE website is CET – Central Europe Time (UTC+1). AoE = Anywhere on Earth.

EDAA Outstanding Dissertations Award 2024

In recognition of the importance of university research to the advancement of design, automation and test, and to encourage young researchers to work in the field, EDAA has established an award for outstanding Ph.D. dissertations in 4 categories:

  • Topic 1 – New directions in systems design methods and tools, simulation and validation, embedded software design and optimization for embedded, cyber-physical, secure and learning systems.
  • Topic 2 – New directions in system-on-chip platforms co-design, novel architectures for future computing in design flows, and power management.
  • Topic 3 – New directions in logic, physical design and CAD for analog/mixed-signal, nano-scale and emerging technologies (such as quantum-, neuromorphic- or biological computing).
  • Topic 4 – New directions in safety, reliability, security-aware hardware design, validation and test

In each category, one award can be given. Each award consists of a 1000 € prize and certificate. The awards will be presented at the DATE 2024 conference, where the awardees need to be present.

Nomination

Eligible are all Ph.D. dissertations which have been defended in the last 2 years before the submission deadline. The total reporting time should not be more than 6 years since the starting of the PhD that should clearly be stated in the applicant CV.

The nominations must be submitted electronically, exclusively in PDF format, through the following URL address: https://www.edaa.com/awards Nomination deadline is 15 December 2023 at midnight (AOE).

Award Chair

Jan Madsen, Technical University of Denmark, Department of Applied Mathematics and Computer Science and EDAA Board member. Email: jamaatdtu [dot] dk

Download the detailed call for nominations here: https://www.edaa.com/wp-content/uploads/2023/11/EDAA_OutstandingDissert…

About EDAA

EDAA is a non-profit association. Its purpose is to operate for educational, scientific and technical purposes for the benefit of the international electronics design and design automation community. The Association, in the field of design and design automation of electronic circuits and systems, promotes a series of high quality technical international conferences and workshops across Europe and cooperates actively to maintain harmonious relationships with other national and international technical societies and groups promoting the purpose of the Association. EDAA is the main sponsor of DATE, the premier Design, Automation and Test Conference in Europe.

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EDAA Achievement Award 2024

In 2024, the European Design and Automation Association (EDAA) will grant the 22nd EDAA Achievement Award.

Scope and Goals

The EDAA Achievement Award shall be given to individuals who made outstanding contributions to the state of the art in electronic design, electronic design automation, testing of electronic systems as well as embedded systems and software, during their career.

Candidates can be of any age. In order to be eligible, candidates must have made innovative contributions which had an impact on the way electronic and embedded systems are being designed. The goal of granting the award is to make the excellent work accomplish by people working within the above scope more widely known and to help publicizing the results more broadly.

Nomination

Nominations should be sent to the Chair of EDAA, David Atienza (david [dot] atienzaatepfl [dot] ch), by 15 December 2023. Nominations should include a 2-/3-page appraisal of the candidate's work.

The award will be handed over during the DATE 2024 opening ceremony in Valencia, Spain.

Download the detailed call for nominations here: https://www.edaa.com/wp-content/uploads/2023/10/EDAA_Achievement_Call-2…

About EDAA

EDAA is a non-profit association. Its purpose is to operate for educational, scientific and technical purposes for the benefit of the international electronics design and design automation community. The Association, in the field of design and design automation of electronic circuits and systems, promotes a series of high quality technical international conferences and workshops across Europe and cooperates actively to maintain harmonious relationships with other national and international technical societies and groups promoting the purpose of the Association. EDAA is the main sponsor of DATE, the premier Design, Automation and Test Conference in Europe.

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DATE 2024 Accepted Papers

Congratulations to the authors and co-authors of the following regular papers and extended abstracts for the acceptance of your papers at DATE 2024! We look forward to meeting you in Valencia at DATE 2024 from 25 to 27 March 2024. 

This is an early notification of acceptance! Further information will be sent to the authors by Tuesday, 14 November 2023 AoE at the latest.

We consider that you/your co-authors are committed to present the paper at the conference in Valencia. We reserve the right to remove the paper from the proceedings if none of the authors/co-authors registers and presents the paper at the conference.

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Promotion & Sponsorship

DATE 2024 offers numerous opportunities to get in contact with the DATE community and to advertise novel solutions.

Download the DATE 2024 Promotion & Sponsorship Opportunities here

DATE is the perfect opportunity to present and communicate your technological and business capabilities to scientific, industrial and commercial audiences at one single European event. All companies, institutions, universities, initiatives and projects that are linked to DATE as promotion partners or sponsors benefit from the additional visibility of their corporate identity, their products, services, expertise and cause.

The DATE 2024 promotion & sponsorship opportunities brochure gives you and idea of what  DATE 2024 can offer. Tailor-made packages can be arranged to suit your special requests. Feel free to contact us to discuss your needs and ideas.

We would be delighted to welcome you among our promotion partners and sponsors at DATE, and to welcome you in Valencia for an interesting programme and effective networking.

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DATE 2024 - Call for Papers

The DATE conference is the main European event bringing together designers and design automation users, researchers and vendors as well as specialists in the hardware and software design, test and manufacturing of electronic circuits and systems. DATE puts a strong emphasis on both technology and systems, covering ICs/SoCs, reconfigurable hardware and embedded systems as well as embedded software.

The three-day event consists of a conference with regular papers, late breaking results papers and extended abstracts, complemented by timely keynotes, special days, focus sessions, embedded tutorials, half-day workshops and multi-partner project sessions. The event will also host the Young People Programme and unplugged sessions fostering the networking and the exchange of information on relevant issues, recent research outcomes and career opportunities.

DATE 2024 is the 27th edition of an event that has always been the place for researchers, young professionals and industrial partners to meet, present their research and discuss the current development and next trends, with high emphasis on social interaction.

DATE 2024 adopts the renewed format that was introduced in 2023. This means that DATE 2024 again uses an intensive three-day format, focussing on interaction as well as further strengthening the community. The vast majority of regular papers will be presented in technical sessions using short flash-presentations, where the emphasis is on poster-supported live interactions (in addition to the common full-length presentation videos available before, during and after the conference). By this, we make sure that the community can actually do what conferences are for: meeting, discussing and exchanging.

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Keynotes

OK01.1 Opening Keynote: CHIPLET STANDARDS: A NEW ROUTE TO ARM-BASED CUSTOM SILICON

Start
Robert Dimon

Robert Dimond, ARM, United Kingdom

Abstract

A key challenge our partners are consistently looking to solve is: How can we continue to push performance boundaries, with maximum efficiency, while managing costs associated with manufacturing and yield? Today, as the ever more complex AI-accelerated computing landscape evolves, a key solution emerging is chiplets. Chiplets are designed to be combined to create larger and more complex systems that can be packaged and sold as a single solution, made of a number of smaller dice instead of one single larger monolithic die. This creates interesting new design possibilities, with one of the most exciting being a potential route to custom silicon for manufacturers who historically chose off-the-shelf solutions. This talk will describe two complementary approaches to realising this chiplet opportunity: · Decomposing an existing system across multiple chiplets, in the same way a monolithic chip is composed of IP blocks. · Aggregating well-defined peripherals across a motherboard into a single package. Both of these approaches require collaboration in standards to align on the many non-differentiating choices in chiplet partitioning. This talk will describe the standards framework that Arm is building with our partners, and the broader industry. Including, own specifications such as the Arm Chiplet System Architecture (Arm CSA), AMBA chip-to-chip and the role of industry standards such as UCIe.

OK02.1 Opening Keynote: ENLIGHTEN YOUR DESIGNS WITH PHOTONIC INTEGRATED CIRCUITS

Start
Luc Augustin

Luc Augustin, SMART Photonics, Netherlands

Abstract

The field of integrated photonics holds great promise for overcoming societal challenges in data and telecom, autonomous driving and healthcare in terms of cost, performance, and scalability. Similar to the semiconductor industry, the ever-increasing demands of various applications are driving the necessity for platform integration in photonics as well, enabling seamless integration of diverse functionalities into compact and efficient photonic devices. This high level of integration reduces footprint and drives down system level costs. In this trend towards high levels of integration , Indium Phosphide (InP) is the material of choice for long-distance communication lasers, owing to its proven track record over several decades. Leveraging standardized fabrication processes, the cost and performance targets can be addressed. The key advantages of InP-based integration lie in its ability to fully integrate lasers, amplifiers, modulators, and passives, providing a flexible and reliable platform for building complex Photonic Integrated Circuits (PICs). This paper will address the photonic integration platforms, the applicability to current and future markets requiring the need for further heterogenous integration with other technologies, and the change to a foundry business model, much like its electronics counterpart.

LK01.1 IEEE CEDA Distinguished Lecturer Lunchtime Keynote: AI MODELS FOR EDGE COMPUTING: HARDWARE-AWARE OPTIMIZATIONS FOR EFFICIENCY

Start

Hai (Helen) Li, Duke University, United States

Hai (Helen) Li
Abstract

As artificial intelligence (AI) transforms various industries, state-of-the-art models have exploded in size and capability. The growth in AI model complexity is rapidly outstripping hardware evolution, making the deployment of these models on edge devices remain challenging. To enable advanced AI locally, models must be optimized for fitting into the hardware constraints. In this presentation, we will first discuss how computing hardware designs impact the effectiveness of commonly used AI model optimizations for efficiency, including techniques like quantization and pruning. Additionally, we will present several methods, such as hardware-aware quantization and structured pruning, to demonstrate the significance of software/hardware co-design. We will also demonstrate how these methods can be understood via a straightforward theoretical framework, facilitating their seamless integration in practical applications and their straightforward extension to distributed edge computing. At the conclusion of our presentation, we will share our insights and vision for achieving efficient and robust AI at the edge.

ASD05K.1 ASD Embedded Keyote: Certainty or Intelligence: Pick One!

Start

Edward Lee, University of California, Berkeley, United States

Edward Lee
Abstract

Mathematical models can yield certainty, as can probabilistic models where the probabilities degenerate. The field of formal methods emphasizes developing such certainty about engineering designs. In safety critical systems, such certainty is highly valued and, in some cases, even required by regulatory bodies. But achieving reasonable performance for sufficiently complex environments appears to require the use of AI technologies, which resist such certainty. This extended abstract suggests that certainty and intelligence may be fundamentally incompatible.

LK02.1 Special Day Lunchtime Keynote: DATA CENTER DEMAND RESPONSE FOR SUSTAINABLE COMPUTING: MYTH OR OPPORTUNITY?

Start

Ayse Coskun, Boston University, United States

Ayse Coskun
Abstract

In our computing-driven era, the escalating power consumption of modern data centers, currently constituting approximately 3% of global energy use, is a burgeoning concern. With the anticipated surge in usage accompanying widespread adoption of AI technologies, addressing this issue becomes imperative. This keynote discusses a potential solution: integrating data centers into grid programs such as “demand response”. This strategy not only augments power usage without necessitating new fossil-fuel infrastructure, but also facilitates more ambitious renewable deployment. However, the unique scale, operational constraints, and future projections of data centers present distinct and urgent challenges for implementing demand response. On the other hand, data centers, in contrast to other electricity consumers, boast greater flexibility in power control and offer the potential for collaborative optimization. This intersection of challenges and capabilities opens avenues for designing intelligent solutions that dynamically adjust data center power usage in response to grid requirements while meeting performance demands.

This keynote delves into the opportunities as well as the myths inherent in this perspective on improving data center sustainability. While obstacles such as creating requisite software infrastructure, establishing institutional trust, and addressing privacy concerns are prominent, the landscape is evolving. Noteworthy achievements have emerged in the development of intelligent solutions that can be swiftly implemented in data centers to accelerate demand response. These multifaceted solutions encompass dynamic power capping, load scheduling, load forecasting, market bidding, and collaborative optimization. This keynote offers insights into the exciting journey towards making sustainable computing a reality.

LK03.1 VALIDATION AND VERIFICATION OF AI-ENABLED VEHICLES IN THEORY AND PRACTICE

Start
Marilyn Wolf & William Widen
Abstract

- Unfortunately, the initial keynote presentation "RESPONSIBLE ARTIFICIAL INTELLIGENCE SYSTEMS: FROM TRUSTWORTHINESS TO GOVERNANCE" by Francisco Herrera (University of Granada, ES) cannot take place as planned and will be substituted by Marilyn Wolf1 and William Widen2 (1University of Nebraska, US; 2University of Nebraska – Lincoln, US):

This talk will consider engineering methods for the evaluation of the safety of AI-enabled vehicles. We do not yet have theories and models for AI systems equivalent to those used to guide software/hardware verification and manufacturing test. However, engineers can adapt existing methods to help provide some assurance as to the safety and effectiveness of AI-enabled vehicles. We will also consider the role of management in the monitoring of validation for AI-enabled vehicles.

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